first one is not pulse but second one is pulserising edge + falling edgepulse with mosfetbut the problem with this the input should to be high for period until the capacitor discharging and Q2 become in saturation mode This is similar to the previous circuit but we add latching since Q2 at cutoff region Q3 in saturation mode this is an useful example how to use generate pulse to reset a counter since you powering the circuit